Este libro también se encuentra disponible en formato eBook:
Integrating formal property verification (FPV) into an existing design process raises several interesting questions. Have I written enough properties? Have I written a consistent set of properties? What should I do when the FPV tool runs into capacity issues? This book develops the answers to these questions and fits them into a roadmap for formal property verification - a roadmap that shows how to glue FPV technology into the traditional validation flow. A Roadmap for Formal Property Verification explores the key issues in this powerful technology through simple examples - you do not need any background on formal methods to read most parts of this book.
INDICE: From the contents 1. Introduction.- 2. Languages for Temporal Properties.- 3. How does the property checker work?- 4. Is my specification consistent?- 5. Have I written enough properties?- 6. Design Intent Coverage.- 7. Test Generation Games.- 8. A Roadmap for Formal Property Verification.- 9. References.
Design verification engineers responsible for complex chip and system designs: CPRs, DSPs, network processors, graphic processors and the SoCs that use them and Electronic Design Automation (EDA) companies developing the next generation of CAD tools for formal design verification
Contacte con nosotros para mejorar la información de este artículo.
Materias de este libro
Submaterias de este libro
Materias de este libro
Submaterias de este libro
Materias de este libro
Submaterias de este libro *
Díaz de Santos
Consulte la ayuda si desea obtener más información al respecto.